Non-volatile memory systems, such as flash memory, have been widely adopted for use in consumer products. Flash memory may be found in different forms, for example in the form of a portable memory card that can be carried between host devices or as a solid state disk (SSD) embedded in a host device. As the non-volatile memory cell scales to smaller dimensions with higher capacity per unit area, the cell endurance due to program and erase cycling, and disturbances (e.g. due to either read or program operation) may become more prominent.
The defect level during the silicon process may become elevated as the memory cell dimension shrinks and process complexity increases. Likewise, time and temperature may hinder data retention (DR) in a memory device. Increased time and/or temperature may cause a device to wear more quickly and/or lose data (i.e. data retention loss). Devices may be switched off for lengthy periods of time during which the data in the non-volatile memory can become more difficult to read therefore requiring greater amounts of error correction. Temperature cycling of a memory device while switched off can add to the data retention problems in non-volatile memory. In the worst case, the data is uncorrectable and therefore has been lost.
One typical approach for determining data retention status for a memory device is measurement of bit error rate (BER) through the scanning of individual memory cells. BER may be used as an estimate for wear, DR, or remaining margin; however, BER is merely the result of the problem and may not be an accurate predictor. Further, scanning the memory cells of a non-volatile memory device may be time consuming and, if done too frequently, may be detrimental to the stored data. Typical scanning of the data in memory cells for determining BER is also reactive in nature in that it detects problems that already exist.